UART

FEATURES

• 16450-compatible register set, except for Divisor Latch register
• 5-8 data bits
• 1-2 stop bits (1½ stop bits are supported with 5 data bits)
• Even, odd, stick or no parity
• All standard baud rates from 40 b/s to 2.5 Mb/s
• 1-byte receive buffer
• 1-byte transmit buffer
• Receive buffer empty interrupt
• Transmit buffer full interrupt
• False start bit detection
• Internal diagnostic capabilities
  • Break simulation
  • Loop-back control for communications link fault isolation

SYSTEM OVERVIEW

The Universal Asynchronous Receiver-Transmitters (UART) provides serial communication for messaging and debug. The UART is 16450-compatibile, with the exception of Modem and flow-control support, and the concatenation of the Divisor Latch register. The modem and flow control signals are unavailable at the chip pins. To allow smaller faster device drivers to be used where backward compatibility is not needed, all relevant bits are gathered into a single register.

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